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ASIC Physical Design FDP 2019, CVR College of Engineering, Ibrahimpatnam, Telangana, 12th - 14th September 2019
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- Event Type:
- Venue/Offline Mode
- Start Date :
- 12th September 2019
- End Date :
- 14th September 2019
- Location :
- Ibrahimpatnam, Telangana
- Organizer :
- CVR College of Engineering
- Category :
- FDP
About Event
The Centre for VLSI Design of Electronics and Communication Engineering (ECE) Department of CVR College of Engineering , Ibrahimpatnam is conducting Three Day Faculty Development Program on “ASIC Physical Design using Cadence Tools” from 12th – 14th September, 2019 from 09:30 am to 3:40 pm. The workshop will be beneficial to the faculty of engineering institutions to conduct UG/PG VLSI laboratories and to pursue research in the field of VLSI Design. So, staff members from ECE/EIE/EEE who are related to VLSI research area can participate in this course.
Registration
Important Dates:
Last date for receiving Applications 08th September, 2019
Date of intimation to the selected candidates through email or SMS 10 th September, 2019
Applications are to be submitted through google link. The registration fee is Rs 600 per participant and it can be paid through net banking A/C
Number 10092106006. SBI Amberpet, IFSC: SBIN 0003605.
Link for Registration: https:://forms gle/KvSMb 37 WX 5 SHLo 43 A [ copy paste in your browser ]
Note : Please visit website www.cvr.ac.in for further details
Events
Course Contents
Introduction to VLSI Design Flow
ASIC Physical Design Flow
Basics of Linux
Introduction to Scripting Languages
Design Constraints for Synthesis
Static Timing Analysis
Physical Design Flow using Cadence Tools
Floorplanning
Placement
Clock Tree Synthesis
Routing
I/O Pad design and placement
Departments:
ECEHow to reach CVR College of Engineering, Ibrahimpatnam
CVR College Of Engineering, Vastunagar, Mangalpalli (V), Ibrahimpatnam (M), Rangareddy (D), Telangana 501 510
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